1. Field of the Invention
This invention relates to a method of manufacturing a miniaturized multilayer ceramic capacitor having high capacitance.
2. Description of the Prior Art:
Recently, as a result of the development of large-scale integration techniques for such devices as IC, LSI and so forth, high-density packaging of electronic components with respect to a circuit substrate has been pursued at a rapid pace so that there have been ever-increasing demands for miniaturized, high capacitance type electronic components such as capacitors to be used in peripheral circuits for integrated circuits.
It is multilayer ceramic capacitors that can most effectively satisfy the above-mentioned demands. Multilayer ceramic capacitors comprise thin dielectric layers which are superimposed upon each other so that increased effective electrode areas can be realized and an increased electrostatic capacitance per unit area can be achieved; thus such capacitors have a reduced size and an increased capacitance.
A promising method of making multilayer ceramic capacitors was proposed by Waku, NTT Special Report, No. 28 (1975) and Yamaoka et al, Advances in Ceramics, Vol. 1, (1981) pp. 232-241). The proposed method comprises the steps of burning a semiconductor ceramic disk the base material of which may be BaTiO.sub.3 or SrTiO.sub.3, for example; applying an insulating additive such as, for example, CuO or Bi.sub.2 O.sub.3 onto the burned semiconductor ceramic disk and then subjecting the disk to a heat treatment to cause the insulating additive to be thermally diffused into the grain boundaries of the semiconductor ceramics, thereby forming a boundary layer structure wherein only the grain boundary portions are insulated; and attaching metal electrodes to the disk. Such a method may be referred to as "solid-phase boundary-layer method" which is adapted to produce capacitors by utilizing an apparent relative permittivity in the range of about 10,000-50,000. However, the conventional method mentioned just above is only applicable in an attempt to produce products of the so-called veneer type and is unable to meet the needs of the times in that it has only a limited capability of achieving capacitors of a reduced size and an increased capacitance.
In view of what has been mentioned above with respect to the prior art, the inventors have made an extensive study in an attempt to achieve a capacitor which is miniaturized and yet of a high capacitance, by taking into account of the advantages of the conventional "solid-phase boundary-layer method", and in the course of the study, have considered fabricating a multilayer capacitor in the form of a solid-phase boundary-layer structure for achieving a ceramic capacitor of a reduced size and an increased capacitance. More specifically, the inventors have considered the possibility that such a capacitor may be achieved by a process which comprises the steps of providing a layer-built structure including ten to several ten layers superimposed upon each other, each of the layers being constituted by a semiconductor ceramics film which may be made of BaTiO.sub.3, for example, as mentioned above and having metal paste applied thereon which serves as an electrode; pressing the layer-built structure; and thereafter sintering the superimposed semiconductor ceramics films and metal paste at the same time. Heretofore, however, it has never been thought of to form such a layer-built structure on the basis of the aforementioned conventional solid-phase boundary-layer method. This is because in the conventional solid-phase boundary-layer method, a grain boundary insulating additive is previously applied to the layer-built structure and then such structure is subjected to a heat treatment so that the additive is thermally diffused into the grain boundaries of the semiconductor ceramics; thus if a layer-built structure such as mentioned above is prepared and if it is attempted to cause the insulating additive supplied thereto to be thermally diffused in the grain boundaries of the semiconductor ceramics constituting the layer-built structure, the below-mentioned difficulties are experienced when the insulating additive is applied and thermally diffused.
In the case where PbO or Bi.sub.2 O.sub.3 is applied as the insulating additive as in the prior art, there is the tendency that the insulating additive is caused to react with Pd, Pd-Ag or the like, which was used for inner electrodes, at a temperature at which a heat treament for thermal diffusion of the insulating additive is effected, so that the inner electrodes may be damaged. Thus, PbO or Bi.sub.2 O.sub.3 was unsuitable for use as insulating additive for layer-built ceramic structure.
In the case where CuO is used as the insulating additive, no reaction with the inner electrodes is caused so that such electrodes are prevented from being subjected to such damages as mentioned above. With a structure wherein CuO is directly applied onto a body of ceramics and thermally diffused therein, however, remarkable dispersions occurred in the dielectric characteristics thereof so that uniform insulation of the grain boundaries in the ceramic body could hardly be achieved.